Experiencel 3+ Years
- Hands on experience in high speed SERDES/ RF/ DDR IO/Analog layout design.
- Must have worked on lower nodes, preferably 7nm and 5nm.
- Must have good hands on experience in doing layout, starting from transistor level drawings to block level integration.
- Knowhow of best practices followed in analog layouts.
- Good knowledge in optimized layout design for better performance.